GDI based full adders for energy efficient arithmetic applications
نویسندگان
چکیده
منابع مشابه
Energy Efficient Implementation for Arithmetic Application in CMOS Full Adders
The overall view of this paper is to attain high speed, low power full adder cells with alternative logic cells that lead to have reduced power delay product. Two high-speed and low-power full adder cells designed with an alternative internal logic structure and pass-transistor logic styles that lead to have a reduced power-delay product (PDP). We carried out a comparison against other full-add...
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Full adder circuit is an essential component for designing of various digital systems. It is used for different applications such as Digital signal processor, microcontroller, microprocessor and data processing units. Due to scaling trends and portability of electronic devices there is a high demand and need for low power and high speed digital circuits with small silicon area. So, design and a...
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In this paper, interesting full adder circuits are reviewed and compared concerning speed, power consumption, and silicon area. A modified full adder is also investigated by combining hybrid logics, namely, pass transistor logic and branch based logic. This architecture uses two independent parts to generate SUM and carry signals. The results show that ultra low power evolution, very small prop...
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ژورنال
عنوان ژورنال: Engineering Science and Technology, an International Journal
سال: 2016
ISSN: 2215-0986
DOI: 10.1016/j.jestch.2015.09.006